DS700PP1
7
CS53L21
TSTO
9
Test Out (Output) - This pin is an output used for test purposes only and must be left “floating” (no con-
nection external to the pin).
NIC
10
11
.Not Internally Connected - This pin is not connected internal to the device and may be connected to
ground or left “floating”. No other external connection should be made to this pin.
VA
12
Analog Power (Input) - Positive power for the internal analog section.
AGND
13
Analog Ground (Input) - Ground reference for the internal analog section.
TSTO
14
Test Out (Output) - This pin is an output used for test purposes only and must be left “floating” (no con-
nection external to the pin).
VQ
15
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
FILT+
16
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
MICIN1/
AIN3A
17
Microphone Input 1 (Input) - The full-scale level is specified in the ADC Analog Characteristics specifi-
cation table.
MICIN2/
BIAS/AIN3B
18
Microphone Input 2 (Input/Output) - The full-scale level is specified in the ADC Analog Characteristics
specification table. This pin can also be configured as an output to provide a low noise bias supply for an
external microphone. Electrical characteristics are specified in the DC Electrical Characteristics table.
AIN2A
19
Analog Input (Input) - The full-scale level is specified in the ADC Analog Characteristics specification
table.
AIN2B/BIAS
20
Analog Input (Input/Output) - The full-scale level is specified in the ADC Analog Characteristics specifi-
cation table. This pin can also be configured as an output to provide a low noise bias supply for an exter-
nal microphone. Electrical characteristics are specified in the DC Electrical Characteristics table.
AFILTA
AFILTB
21
22
Filter Connection (Output) - Filter connection for the ADC inputs.
AIN1A
AIN1B
23
24
Analog Input (Input) - The full-scale level is specified in the ADC Analog Characteristics specification
table.
RESET
25
Reset (Input) - The device enters a low power mode when this pin is driven low.
VL
26
Digital Interface Power (Input) - Determines the required signal level for the serial audio interface and
host control port. Refer to the Recommended Operating Conditions for appropriate voltages.
VD
27
Digital Power (Input) - Positive power for the internal digital section.
DGND
28
Digital Ground (Input) - Ground reference for the internal digital section.
SDOUT
(M/S)
29
Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
Serial Port Master/Slave (Input/Output) - Hardware Mode Startup Option: Selects between Master and
Slave Mode for the serial port.
MCLK
30
Master Clock (Input) - Clock source for the delta-sigma modulators.
SCLK
31
Serial Clock (Input/Output) -- Serial clock for the serial audio interface.
TSTN
32
Test In (Input) - This pin is an input used for test purposes only and should be tied to DGND for normal
operation.
Thermal Pad
-
Thermal relief pad for optimized heat dissipation. See “QFN Thermal Pad” on page 59.
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